全新原装进口供应ADG611YR/ADG611YRUZ-REEL7四通道单刀单掷开关
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adg611、adg612和adg613均为单芯片cmos器件,内置四个独立可选的开关。+25ºc时,这些开关提供1 pc的超低电荷注入和100 pa的泄漏电流。
上述器件的额定电源电压为±5 v、5 v和3 v,均内置四个独立的单刀单掷(spst)开关。adg611与adg612的唯一不同是数字控制逻辑相反。adg611开关的接通条件是相关控制输入为逻辑低电平,而adg612开关接通则要求逻辑高电平。adg613有两个开关的数字控制逻辑与adg611相似,但其它两个开关的控制逻辑则相反。
当接通时,各开关在两个方向的导电性能相同,输入信号范围可扩展至电源电压范围。adg613为先开后合式开关。adg611/adg612/adg613均提供小型、16引脚tssop封装,adg611还提供16引脚soic封装。
features
1 pc charge injection
±2.7 v to ±5.5 v dual-supply operation
+2.7 v to +5.5 v single-supply operation
automotive temperature range: .40°c to +125°c
100 pa maximum at 25°c leakage currents
85 ω on resistance
rail-to-rail switching operation
fast switching times
16-lead tssop and soic packages
typical power consumption: <0.1 μw
ttl-/cmos-compatible inputs
applications
automatic test equipment
data ac systems
battery-powered systems
communications systems
sample-and-hold systems
audio signal routing
relay replacement
avionics
functional block diagram
adobe systems
notes1. switches shown for a logic 1 input.
in1in2in3in4s1d1s2d2s3d3s4d4adg611in1in2in3in4s1d1s2d2s3d3s4d4adg612in1in2in3in4s1d1s2d2s3d3s4d4adg61302753-
001
figure 1.
general description
the adg611/adg612/adg613 are monolithic cmos devices
containing four independently selectable switches. these switches
offer ultralow charge injection of 1 pc over the full input signal
range and typical leakage currents of 10 pa at 25°c.
the devices are fully specified for ±5 v, +5 v, and +3 v supplies.
each contains four independent single-pole, single-throw (spst)
switches. the adg611 and adg612 differ only in that the digital
control logic is inverted. the adg611 switches are turned on
with a logic low on the appropriate control input, whereas a
logic high is required to turn on the switches of the adg612.
the adg613 contains two switches with digital control logic
similar to that of the adg611 and two switches in which the
logic is inverted.
each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. the
adg613 exhibits break-before-make switching action. the
adg611/adg612/adg613 are available in a small, 16-lead
tssop package, and the adg611 is also available in a 16-lead
soic package.
product highlights
1. ultralow charge injection (1 pc typically).
2. dual ±2.7 v to ±5.5 v or single +2.7 v to +5.5 v operation.
3. automotive temperature range: .40°c to +125°c.
4. small, 16-lead tssop and soic packages.
table of contents
features .............................................................................................. 1
applications ....................................................................................... 1
functional block diagram .............................................................. 1
general description ......................................................................... 1
product highlights ........................................................................... 1
revision history ............................................................................... 2
specifications ..................................................................................... 3
dual-supply operation ............................................................... 3
single-supply operation ............................................................. 4
absolute maximum ratings ............................................................6
esd caution...................................................................................6
pin configuration and function descriptions ..............................7
typical performance characteristics ..............................................8
terminology .................................................................................... 10
test circuits ..................................................................................... 11
applications information .............................................................. 13
outline dimensions ....................................................................... 14
ordering guide .......................................................................... 14
revision history
11/09—rev. 0 to rev. a
changes to analog signal range parameter
and to on resistance, ron parameter, table 1 .......................... 3
change to digital input capacitance, cin parameter, table 2 .... 4
changes to table 4 and to absolute maximum ratings section ...... 6
added table 5; renumbered se .................................... 7
updated outline dimensions ....................................................... 14
changes to ordering guide .......................................................... 14
1/02—revision 0: initial version
specifications
dual-supply operation
vdd = +5 v ± 10%, vss = .5 v ± 10%, gnd = 0 v, unless otherwise noted.
table 1.
parameter
+25°c
.40°c to +85°c
.40°c to +125°c1
unit
test conditions/comments
analog switch
analog signal range
vss to vdd
v
on resistance, ron
85
ω typ
vs = ±3 v, is = .1 ma; see figure 14
115
140
160
ω max
vs = ±3 v, is = .1 ma; see figure 14
on-resistance match
between channels, δron
2
ω typ
vs = ±3 v, is = .1 ma
4
5.5
6.5
ω max
vs = ±3 v, is = .1 ma
on-resistance flatness, rflat(on)
25
ω typ
vs = ±3 v, is = .1 ma
40
55
60
ω max
vs = ±3 v, is = .1 ma
leakage currents
vdd = +5.5 v, vss = .5.5 v
source off leakage, is(off)
±0.01
na typ
vd = ±4.5 v, vs = +4.5 v; see figure 15
±0.1
±0.25
±2
na max
vd = ±4.5 v, vs = +4.5 v; see figure 15
drain off leakage, id(off)
±0.01
na typ
vd = ±4.5 v, vs = + 4.5 v; see figure 15
±0.1
±0.25
±2
na max
vd = ±4.5 v, vs = + 4.5 v; see figure 15
channel on leakage, id(on), is(on)
±0.01
na typ
vd = vs = ±4.5 v; see figure 16
±0.1
± 0.25
± 6
na max
vd = vs = ±4.5 v; see figure 16
digital inputs
input high voltage, vinh
2.4
v min
input low voltage, vinl
0.8
v max
input current, iinl or iinh
0.005
μa typ
vin = vinl or vinh
±0.1
μa max
vin = vinl or vinh
digital input capacitance, cin
2
pf typ
dynamic characteristics2
ton
45
ns typ
rl = 300 ω, cl = 35 pf, vs = 3.0 v; see figure 17
65
75
90
ns max
toff
25
ns typ
40
45
50
ns max
break-before-make time delay, tbbm
15
ns typ
rl = 300 ω, cl = 35 pf, vs1 = vs2 = 3.0 v; see figure 18
10
ns min
charge injection
.0.5
pc typ
vs = 0 v, rs = 0 ω, cl = 1 nf; see figure 19
off isolation
.65
db typ
rl = 50 ω, cl = 5 pf, f = 10 mhz; see figure 20
channel-to-channel crosstalk
.90
db typ
rl = 50 ω, cl = 5 pf, f = 10 mhz; see figure 21
.3 db bandwidth
680
mhz typ
rl = 50 ω, cl = 5 pf; see figure 22
cs(off)
5
pf typ
f = 1 mhz
cd(off)
5
pf typ
f = 1 mhz
cd(on), cs(on)
5
pf typ
f = 1 mhz
power requirements
vdd = +5.5 v, vss = .5.5 v
idd
0.001
μa typ
digital inputs = 0 v or 5.5 v
1.0
μa max
digital inputs = 0 v or 5.5 v
iss
0.001
μa typ
digital inputs = 0 v or 5.5 v
1.0
μa max
digital inputs = 0 v or 5.5 v
1 the temperature range for the y version is .40°c to +125°c.
2 guaranteed by design; not subject to production test.
1 the temperature range for the y version is .40°c to +125°c.
single-supply operation
vdd = 5 v ± 10%, vss = 0 v, gnd = 0 v, unless otherwise noted.
table 2.
parameter
+25°c
.40°c to +85°c
.40°c to +125°c1
unit
test conditions/comments
analog switch
analog signal range
0 to vdd
v
on resistance, ron
210
ω typ
vs = 3.5 v, is = .1 ma; see figure 14
290
350
380
ω max
vs = 3.5 v, is = .1 ma; see figure 14
on-resistance match
between channels, δron
3
ω typ
vs = 3.5 v, is = .1 ma
10
12
13
ω max
vs = 3.5 v, is = .1 ma
leakage currents
vdd = 5.5 v
source off leakage, is(off)
±0.01
na typ
vs = 1 v/4.5 v, vd = 4.5 v/1 v; see figure 15
±0.1
±0.25
±2
na max
vs = 1 v/4.5 v, vd = 4.5 v/1 v; see figure 15
drain off leakage, id(off)
±0.01
na typ
vs = 1 v/4.5 v, vd = 4.5 v/1 v; see figure 15
±0.1
±0.25
±2
na max
vs = 1 v/4.5 v, vd = 4.5 v/1 v; see figure 15
channel on leakage, id(on), is(on)
±0.01
na typ
vs = vd = 1 v or 4.5 v; see figure 16
±0.1
±0.25
±6
na max
vs = vd = 1 v or 4.5 v; see figure 16
digital inputs
input high voltage, vinh
2.4
v min
input low voltage, vinl
0.8
v max
input current, iinl or iinh
0.005
μa typ
vin = vinl or vinh
±0.1
μa max
vin = vinl or vinh
digital input capacitance, cin
2
pf typ
dynamic characteristics2
ton
70
ns typ
100
130
150
ns max
toff
25
ns typ
40
45
50
ns max
break-before-make time delay, tbbm
25
ns typ
10
ns min
charge injection
1
pc typ
off isolation
.62
db typ
channel-to-channel crosstalk
.90
db typ
.3 db bandwidth
680
mhz typ
rl = 50 ω, cl = 5 pf; see figure 22
cs(off)
5
pf typ
f = 1 mhz
cd(off)
5
pf typ
f = 1 mhz
cd(on), cs(on)
5
pf typ
f = 1 mhz
power requirements
vdd = 5.5 v
idd
0.001
μa typ
digital inputs = 0 v or 5.5 v
1.0
μa max
digital inputs = 0 v or 5.5 v
vdd = 3 v ± 10%, vss = 0 v, gnd = 0 v, unless otherwise noted.
table 3.
parameter
+25°c
.40°c to +85°c
.40°c to +125°c1
unit
test conditions/comments
analog switch
analog signal range
0 to vdd
v
on resistance, ron
380
420
460
ω typ
vs = 1.5 v, is = .1 ma; see figure 14
leakage currents
vdd = 3.3 v
source off leakage, is(off)
±0.01
na typ
vs = 1 v/3 v, vd = 3 v/1 v; see figure 15
±0.1
±0.25
± 2
na max
vs = 1 v/3 v, vd = 3 v/1 v; see figure 15
drain off leakage, id(off)
±0.01
na typ
vs = 1 v/3 v, vd = 3 v/1 v; see figure 15
±0.1
±0.25
±2
na max
vs = 1 v/3 v, vd = 3 v/1 v; see figure 15
channel on leakage, id(on), is(on)
±0.01
na typ
vs = vd = 1 v or 3 v; see figure 16
±0.1
±0.25
±6
na max
vs = vd = 1 v or 3 v; see figure 16
digital inputs
input high voltage, vinh
2.0
v min
input low voltage, vinl
0.8
v max
input current, iinl or iinh
0.005
μa typ
vin = vinl or vinh
±0.1
μa max
vin = vinl or vinh
digital input capacitance, cin
2
pf typ
dynamic characteristics2
ton
130
ns typ
rl = 300 ω, cl = 35 pf, vs = 2 v; see figure 17
185
230
260
ns max
toff
40
ns typ
55
60
65
ns max
break-before-make time delay, tbbm
50
ns typ
rl = 300 ω, cl = 35 pf, vs1 = vs2 = 2 v; see figure 18
10
ns min
charge injection
1.5
pc typ
off isolation
.62
db typ
channel-to-channel crosstalk
.90
db typ
.3 db bandwidth
680
mhz typ
rl = 50 ω, cl = 5 pf; see figure 22
cs(off)
5
pf typ
f = 1 mhz
cd(off)
5
pf typ
f = 1 mhz
cd(on), cs(on)
5
pf typ
f = 1 mhz
power requirements
vdd = 3.3 v
idd
0.001
μa typ
digital inputs = 0 v or 3.3 v
1.0
μa max
digital inputs = 0 v or 3.3 v
absolute maximum ratings
ta = 25°c, unless otherwise noted
table 4.
parameter
rating
vdd to vss
13 v
vdd to gnd
.0.3 v to +6.5 v
vss to gnd
+0.3 v to .6.5 v
analog inputs1
vss . 0.3 v to vdd + 0.3 v
digital inputs1
gnd . 0.3 v to vdd + 0.3 v or
30 ma, whichever occurs first
peak current, s or d
20 ma (pulsed at 1 ms, 10%
duty cycle maximum)
continuous current, s or d
10 ma
3 v operation 85°c to 125°c
7.5 ma
operating temperature range
automotive (y version)
.40°c to +125°c
storage temperature range
.65°c to +150°c
junction temperature
150°c
θja thermal impedance
16-lead tssop
150.4°c/w
16-lead soic, 4-layer board
80.6°c/w
lead soldering
lead temperature, soldering
(10 sec)
300°c
ir reflow, peak temperature
(<20 sec)
220°c
(pb-free) soldering
reflow, peak temperature
260(+0/.5)°c
time at peak temperature
20 sec to 40 sec
1overvoltages at in, s, or d are clamped by internal diodes. the current
should be limited to the maximum ratings given.
stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. this is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
only one absolute maximum rating can be applied at any one time.
esd caution
adobe systems
adobe systems
pin configuration and function descriptions
adobe systems
adg611/
adg612/
adg613top view(not to scale)
1in12d13s14vss5gnd6s47d48in41109in2d2s2vddncs3d3in3nc = no connect02753-
002
figure 2. pin configuration
table 5. pin function descriptions
pin no.
mnemonic
description
1
in1
switch 1 digital control input.
2
d1
drain terminal of switch 1. can be an input or output.
3
s1
source terminal of switch 1. can be an input or output.
4
vss
most negative power supply terminal. tie this pin to gnd when using the device with single-supply voltages.
5
gnd
ground (0 v) reference.
6
s4
source terminal of switch 4. can be an input or output.
7
d4
drain terminal of switch 4. can be an input or output.
8
in4
switch 4 digital control input.
9
in3
switch 3 digital control input.
10
d3
drain terminal of switch 3. can be an input or output.
11
s3
source terminal of switch 3. can be an input or output.
12
nc
not internally connected.
13
vdd
most positive power supply terminal.
14
s2
source terminal of switch 2. can be an input or output.
15
d2
drain terminal of switch 2. can be an input or output.
16
in2
switch 2 digital control input.
table 6. adg611/adg612 truth table
adg611 input
adg612 input
switch condition
0
1
on
1
0
off
table 7. adg613 truth table
logic
switch 1, switch 4
switch 2, switch 3
0
off
on
1
on
off
typical performance characteristics
adobe systems
250050100150200–5–4–3–2–1012345on resistance
(
ω)
vd, vs (v)
ta = 25°c±3.3v±4.5v±5.5v±5.0v±2.7v±3.0v02753-
003
figure 3. on resistance vs. vd (vs), dual supplies
adobe systems
600500400300200100000.51.01.52.02.53.03.54.04.55.0on resistance
(
ω)
vd, vs (v)
ta = 25°cvss = 0vvdd = 2.7vvdd = 3.0vvdd = 3.3vvdd = 4.5vvdd = 5.0v02753-
004
figure 4. on resistance vs. vd (vs), single supply
adobe systems
250050100150200–5–4–3–2–1012345on resistance
(
ω)
vd, vs (v)
vdd = +5vvss = –5v+125°c+85°c–40°c+25°c02753-
005
figure 5. on resistance vs. vd (vs) for various temperatures, dual supplies
adobe systems
600500400300200100000.51.01.52.02.53.03.54.04.55.0on resistance
(
ω)
vd, vs (v)
vdd = 5vvss = 0v+125°c+85°c+25°c–40°c02753-
006
figure 6. on resistance vs. vd (vs) for various temperatures, single supply
adobe systems
210–1–2–3–4–5–6020406080100120leakage
current
(
na)
temperature (°c)
vdd = +5vvss = –5vis(off)
id(off)
is(on), id(on)
02753-
007
figure 7. leakage current vs. temperature, dual supplies
adobe systems
210–1–2–3–4–5–6020406080100120leakage
current
(
na)
temperature (°c)
vdd = 5vvss = 0vis(off)
id(off)
is(on), id(on)
02753-
008
figure 8. leakage current vs. temperature, single supply
adobe systems
2.0–2.0–1.5–1.0–0.500.51.01.5–5–4–3–2–1012345qinj
(pc)
vs (v)
ta = 25°cvdd = +3vvss = 0vvdd = +5vvss = 0vvdd = +5vvss = –5v02753-
009
figure 9. charge injection vs. source voltage
adobe systems
120100806040200–400–2020406080100120time
(
ns)
temperature (°c)
ton, vdd = +5vvss = 0vton, vdd = +5vvss = –5vtoff, vdd = +5vvss = 0vtoff, vdd = +5vvss = –5v02753-
010
figure 10. ton/toff times vs. temperature
adobe systems
0–2–4–6–8–10–12–14–16–180.31k100101attenuation (
db)
frequency (mhz)
ta = 25°cvdd = –5vvss = +5vvdd = +5vvss = 0v02753-
011
figure 11. on response vs. frequency
adobe systems
0–10–20–30–40–50–60–70–80–900.31k100101off isolation
(
db)
frequency (mhz)
vdd = –5vvss = +5vta = 25°c02753-
012
figure 12. off isolation vs. frequency
adobe systems
0–10–20–30–40–50–60–70–80–100–900.31k100101crosstalk (
db)
frequency (mhz)
vdd = +5vvss = –5vta = 25°c02753-
013
figure 13. crosstalk vs. frequency
terminology
vdd
most positive power supply potential.
vss
most negative power supply potential.
idd
positive supply current.
iss
negative supply current.
gnd
ground (0 v) reference.
s
source terminal. can be an input or output.
d
drain terminal. can be an input or output.
in
logic control input.
vd (vs)
analog voltage on terminal d and terminal s.
ron
ohmic resistance between terminal d and terminal s.
δron
on-resistance match between any two channels, that is,
ronmax . ronmin.
rflat(on)
flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
is(off)
source leakage current with the switch off.
id(off)
drain leakage current with the switch off.
id(on), is(on)
channel leakage current with the switch on.
vinl
maximum input voltage for logic 0.
vinh
minimum input voltage for logic 1.
iinl, iinh
input current of the digital input.
cs(off)
off switch source capacitance. measured with reference
to ground.
cd(off)
off switch drain capacitance. measured with reference
to ground.
cd(on), cs(on)
on switch capacitance. measured with reference to ground.
cin
digital input capacitance.
ton
delay between applying the digital control input and the output
switching on (see figure 17).
toff
delay between applying the digital control input and the output
switching off (see figure 17).
charge injection
a measure of the glitch impulse transferred from the digital
input to the analog output during switching.
off isolation
a measure of unwanted signal coupling through an off switch.
crosstalk
a measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
on response
frequency response of the on switch.
insertion loss
loss due to the on resistance of the switch.
test circuits
adobe systems
idsv1sdvsron = v1/ids02753-
014
figure 14. on resistance
adobe systems
sdvsvdis(off)id(off)
aa02753-
015
figure 15. off leakage
adobe systems
sdvdid(on)
ancnc = no connect02753-
016
figure 16. on leakage
adobe systems
vddvssvddvss0.1μf0.1μfgndtontoffrl300ωcl35pfvsinsd50%50%
90%90%
50%50%
voutvoutvinvinadg612adg61102753-
017
figure 17. switching times
adobe systems
vddvssvdd0.1μf0.1μfvssvs1vs2vinin1,
in2s1d1gnds2d2adg61350%50%
90%90%
90%90%
tbbmtbbm0v0v0vrl1300ωcl135pfrl2300ωcl235pfvout1vinvout1vout2vout202753-
018
figure 18. break-before-make time delay
adobe systems
vddvssvddvssvsinsdrsonoffgndvoutvinvinadg611adg612voutqinj = cl × δvoutδvoutcl1nf02753-
019
figure 19. charge injection
adobe systems
voutrl50ωingndvinsdvddvssvddvss50ωnetworkanalyzeroff isolation = 20 logvoutvs0.1μf0.1μf50ωvs02753-
020
figure 20. off isolation
adobe systems
rl50ωvddvssvddvss50ω0.1μf0.1μfvsgndvin2sdsdncvoutvin1channel-to-channel crosstalk = 20 log |vs/vout|02753-
021
figure 21. channel-to-channel crosstalk
adobe systems
voutrl50ωingndvinsdvddvssvddvssnetworkanalyzerinsertion loss = 20 logvout with switchvout without switch0.1μf0.1μf50ωvs02753-
022
figure 22. bandwidth
applications information
figure 23 illustrates a photodetector circuit with programmable
gain. with the resistor values shown in this figure, gains in the
range of 2 to 16 can be achieved by using different combinations
of switches.
adobe systems
r133kωr2510kωr4240kωr5240kωr6120kωr7120kωr8120kωr3510kωr9120kωr9120kωs1d1s2d2s3d3s4d4gndc12.5vd15vvout5v2.5vgain range: 2 to 16(lsb) in1in2in3(msb) in402753-
023
figure 23. photodetector circuit with programmable gain
1 z = rohs compliant part.
outline dimensions
adobe systems
16981pin 1seatingplane8°
0°
4.504.404.306.40bsc5.105.004.900.65bsc0.150.051.20max0.200.090.750.600.450.300.19coplanarity0.10compliant to jedec standards mo-153-ab
figure 24. 16-lead thin shrink small outline package [tssop]
(ru-16)
dimensions shown in millimeters
adobe systems
controlling dimensionsare in millimeters; inch dimensions(inparentheses)are rounded-off millimeter e forreference onlyandare notappropriate for use in design.
compliantto jedec standards ms-012-ac10.00 (0.3937)
9.80 (0.3858)
169816.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
bscseatingplane0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
coplanarity0.108°
0°
060606-a45°
figure 25. 16-lead standard small outline package [soic_n]
narrow body
(r-16)
dimensions shown in millimeters and (inches)
ordering guide
model
temperature range
package option
adg611yruz1
.40°c to +125°c
ru-16
adg611yruz-reel1
.40°c to +125°c
ru-16
adg611yruz-reel71
.40°c to +125°c
ru-16
adg611yrz1
.40°c to +125°c
r-16
adg612yruz1
.40°c to +125°c
ru-16
adg612yruz-reel1
.40°c to +125°c
ru-16
adg612yruz-reel71
.40°c to +125°c
ru-16
adg612wruz-reel1
.40°c to +125°c
ru-16
adg613yruz1
.40°c to +125°c
ru-16
adg613yruz-reel1
.40°c to +125°c
ru-16
adg613yruz-reel71
.40°c to +125°c
package description
16-lead thin shrink small outline package [tssop]
16-lead thin shrink small outline package [tssop]
16-lead thin shrink small outline package [tssop]
16-lead standard small outline package [soic_n]
16-lead thin shrink small outline package [tssop]
16-lead thin shrink small outline package [tssop]
16-lead thin shrink small outline package [tssop]
16-lead thin shrink small outline package [tssop]
16-lead thin shrink small outline package [tssop]
16-lead thin shrink small outline package [tssop]
16-lead thin shrink small outline package [tssop]
ru-16
notes
notes
.2002–2009 analog devices, inc. all rights reserved. trademarks and
registered trademarks are the property of their respective owners.
d02753-0-11/09(a)
adobe systems
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本产品的品牌是ANALOGDEVICES,型号是ADG611YRUZ-REEL7,种类是刀型,额定电压是标准(V),额定电流是标准(A),接触电阻是标准(Ω),绝缘电阻是标准(MΩ),产品性质是新品,营销方式是库存,营销价格是特价,加工定制是否
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